 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| VND5N07/VND5N07-1 VNP5N07FI/K5N07FM "OMNIFET": FULLY AUTOPROTECTED POWER MOSFET Table 1. General Features Type VND5N07 VND5N07-1 VND5N07FI VND5N07FM Vclamp RDS(on) 0.2 Ilim Figure 1. Package 70 V 5A 3 1 DPAK TO-252 IPAK TO-251 3 2 1 LINEAR CURRENT LIMITATION THERMAL SHUT DOWN SHORT CIRCUIT PROTECTION INTEGRATED CLAMP LOW CURRENT DRAWN FROM INPUT PIN DIAGNOSTIC FEEDBACK THROUGH INPUT PIN ESD PROTECTION DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) COMPATIBLE WITH STANDARD POWER MOSFET 3 1 ISOWATT220 2 SOT-82FM DESCRIPTION The VND5N07, VND5N07-1, VNP5N07FI and VNK5N07FM are monolithic devices made using STMicroelectronics VIPower M0 Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shut-down, linear current limitation and overvoltage clamp protect the chip in harsh enviroments. Fault feedback can be detected by monitoring the voltage at the input pin. Table 2. Order Codes Package DPAK IPAK ISOWATT220 SOT-82FM Tube VND5N07 VND5N07-1 VND5N07FI VND5N07FM Tape and Reel VND5N0713TR - - - REV. 2 June 2004 1/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Figure 2. Block Diagram Table 3. Absolute Maximum Ratings Value Symbol Parameter DPAK IPAK VDS Vin ID IR Vesd Ptot Tj Tc Tstg Drain-Source Voltage (Vin = 0) Input Voltage Drain Current Reverse DC Output Current Electrostatic Discharge (C = 100 pF, R =1.5 K) Total Dissipation at Tc = 25 C Operating Junction Temperature Case Operating Temperature Storage Temperature 60 Internally Clamped 18 Internally Limited -7 2000 24 Internally Limited Internally Limited -55 to 150 9 V V A A V W C C C ISOWATT220 SOT-82FM Unit Table 4. Thermal Data Symbol Rthj-case Rthj-amb Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max DPAK/IPAK 3.75 100 ISOWATT220 5.2 62.5 SOT-82FM 14 100 Unit C/W C/W 2/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM ELECTRICAL CHARACTERISTICS (Tcase = 25C unless otherwise specified) Table 5. Off Symbol VCLAMP VCLTH VINCL IDSS IISS Parameter Drain-source Clamp Voltage Test Conditions ID = 200 mA; Vin = 0 Min. 60 55 -1 -0.3 50 200 250 500 Typ. 70 Max. 80 Unit V V V A A A Drain-source Threshold Voltage ID = 2 mA; Vin = 0 Input-Source Reverse Clamp Voltage Zero Input Voltage Drain Current (Vin = 0) Supply Current from Input Pin Iin = -1 mA VDS = 13 V; Vin = 0 VDS = 25 V; Vin = 0 VDS = 0 V; Vin = 10 V Table 6. On (1) Symbol VIN(th) RDS(on) Parameter Input Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = Vin; ID + Iin = 1 mA Vin = 10 V; ID = 2.5 A Vin = 5 V; ID = 2.5 A Min. 0.8 Typ. Max. 3 0.200 0.280 Unit V Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5% Table 7. Dynamic Symbol gfs (2) Coss Parameter Forward Transconductance Output Capacitance Test Conditions VDS = 13 V; ID = 2.5 A VDS = 13 V; f = 1 MHz; Vin = 0 Min. 3 Typ. 4 200 300 Max. Unit S pF Note: 2. Pulsed: Pulse duration = 300 s, duty cycle 1.5%. Table 8. Switching (3) Symbol td(on) tr td(off) tf td(on) tr td(off) tf (di/dt)on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Current Slope Total Input Charge VDD = 15 V; ID = 2.5 A Vin = 10 V; Rgen = 10 VDD = 12 V; ID = 2.5 A; Vin = 10 V VDD = 15 V; Id = 2.5 A; Vgen = 10V; Rgen = 1000 (see Figure 28) Test Conditions VDD = 15 V; Id = 2.5 A; Vgen = 10V; Rgen = 10 (see Figure 28) Min. Typ. 50 60 150 40 150 400 3900 1100 80 18 Max. 100 100 300 80 250 600 5000 1600 Unit ns ns ns ns ns ns ns ns A/S nC Note: 3. Parameters guaranteed by design/characterization. 3/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM ELECTRICAL CHARACTERISTICS (cont'd) Table 9. Source Drain Diode Symbol VSD(4) trr(5) Qrr(5) IRRM(5) Parameter Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Test Conditions ISD = 2.5 A; Vin = 0 ISD = 2.5 A; di/dt = 100 A/s VDD = 30 V; Tj = 25 C (see test circuit, Figure 30) 150 0.3 5.7 Min. Typ. Max. 1.6 Unit V ns C A Note: 4. Pulsed: Pulse duration = 300 s, duty cycle 1.5% 5. Parameters guaranteed by design/characterization. Table 10. Protection Symbol Ilim tdlim(6) Tjsh(6) Tjrs(6) Igf(6) Eas(6) Parameter Drain Current Limit Step Response Current Limit Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy Vin = 10 V; VDS = 13 V Vin = 5 V; VDS = 13 V starting Tj = 25 C; VDD = 20 V Vin = 10 V; Rgen = 1 K; L = 10 mH 0.2 Test Conditions Vin = 10 V; VDS = 13 V Vin = 5 V; VDS = 13 V Vin = 10 V Vin = 5 V 150 135 50 20 Min. 3.5 3.5 Typ. 5 5 15 40 Max. 7 7 20 60 Unit A A s s C C mA mA J Note: 6. Parameters guaranteed by design/characterization. PROTECTION FEATURES During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user's standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. The device integrates: - OVERVOLTAGE CLAMP PROTECTION: internally set at 70V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. - LINEAR CURRENT LIMITER CIRCUIT: limits the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, and the ability to be driven from a TTL Logic circuit 4/15 junction temperature may reach the overtemperature threshold Tjsh. - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150C. The device is automatically restarted when the chip temperature falls below 135C. - STATUS FEEDBACK: In the case of an overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 . The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model (with a small increase in RDS(on)). VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Figure 3. Thermal Impedance for DPAK/IPAK Figure 4. Thermal Impedance for ISOWATT220 Figure 5. Derating Curve Figure 6. Output Characteristics Figure 7. Transconductance Figure 8. Static Drain-source On Resistance vs Input Voltage 5/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Figure 9. Static Drain-Source On Resistance Figure 10. Static Drain-Source On Resistance Figure 11. Input Charge vs Input Voltage Figure 12. Capacitance Variations Figure 13. Normalized Input Threshold Voltage vs Temperature Figure 14. Normalized On Resistance vs Temperature 6/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Figure 15. Normalized On Resistance vs Temperature Figure 16. Turn-on Current Slope Figure 17. Turn-on Current Slope Figure 18. Turn-off Drain-Source Voltage Slope Figure 19. Turn-off Drain-Source Voltage Slope Figure 20. Switching Time Resistive Load 7/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Figure 21. Switching Time Resistive Load Figure 22. Switching Time Resistive Load Figure 23. Current Limit vs Junction Temperature Figure 24. Step Response Current Limit Figure 25. Source Drain Diode Forward Characteristics 8/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Figure 26. Unclamped Inductive Load Test Circuit Figure 27. Unclamped Inductive Waveforms Figure 28. Switching Times Test Circuits For Resistive Load Figure 29. Input Charge Test Circuit Figure 30. Test Circuit For Inductive Load Switching And Diode Recovery Times Figure 31. Waveforms 9/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM PACKAGE MECHANICAL Table 11. DPAK Mechanical Data Symbol A A1 A2 B B2 C C2 D D1 E E1 e G H L2 L4 R V2 Package Weight 0 0.60 0.2 8 Gr. 0.29 4.40 9.35 0.8 1.00 6.40 4.7 2.28 4.60 10.10 millimeters Min 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6.00 5.1 6.60 Typ Max 2.40 1.10 0.23 0.90 5.40 0.60 0.60 6.20 Figure 32. DPAK Package Dimensions P032P Note: Drawing is not to scale. 10/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Table 12. IPAK Mechanical Data Symbol A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 millimeters Min 2.2 0.9 0.7 0.64 5.2 Typ Max 2.4 1.1 1.3 0.9 5.4 0.85 Figure 33. IPAK Package Dimensions H C A C2 = B3 = L2 D B6 A1 L = B2 = 3 B5 G E = = L1 Note: Drawing is not to scale. 1 2 B A3 11/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Table 13. ISOWATT220 Mechanical Data Symbol A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 28.6 9.8 15.9 9 3 millimeters Min 4.4 2.5 2.5 0.4 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 Typ Max 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 Figure 34. ISOWATT220 Package Dimensions A B L3 L6 L7 F1 D F G1 E H F2 123 L2 L4 Note: Drawing is not to scale. 12/15 G VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Table 14. SOT-82FM Mechanical Data millimeters Symbol Min A A1 b b1 b2 c D e E L L 2.85 1.47 0.40 1.4 1.3 0.45 10.5 2.2 7.45 15.5 1 1.95 Typ Max 3.05 1.67 0.60 1.6 1.5 0.6 10.9 2.8 7.75 15.9 2.35 Figure 35. SOT-82FM Package Dimensions Note: Drawing is not to scale. 13/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM REVISION HISTORY Table 15. Revision History Date June-1996 18-June-2004 Revision 1 2 First Issue Stylesheet update. No content change. Description of Changes 14/15 VND5N07/VND5N07-1/VNP5N07FI/K5N07FM Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com 15/15 |
Price & Availability of VNP5N07FI
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |